Call for Presentations
Intel Xeon Phi User Group (IXPUG) Annual Spring Conference 2011
The Stephen Hawking Centre for Theoretical Cosmology, Univerity of Cambridge, UK
11th – 13th April 2017
Abstract Submission Deadline: Sun 26th February
IXPUG is about sharing ideas, implementations, and experiences that will help users take advantage of the latest in Intel Xeon Phi technology, such as AVX512 and high-bandwidth MCDRAM memory, as well as relevant high-performance system fabrics on large-scale KNL-based systems (e.g. OmniPath).
Hosted by the The Stephen Hawking Centre for Theoretical Cosmology (CTC) at the University of Cambridge, the IXPUG Annual Spring Conference 2017 will centre on Xeon Phi-focused activity (including presentations and tutorials), where you will experience an open forum with fellow application programmers, software developers, Intel Xeon Phi architecture designers, and compiler and tool experts. Application performance and scalability challenges at all levels will be covered, including application tuning on large KNL systems.
Call for Presentations:
IXPUG welcomes submissions on innovative work from KNL users in academia, industry and government labs, describing original discoveries and experiences that will promote and prescribe efficient use of many-core and multicore systems.
The authors of the best scored abstracts and draft presentations will be selected for a full 30 minute presentation; others may be offered an opportunity to present shorter Lightning Talks.
A short Abstract and Draft Presentation should be submitted by Sun 26th February.
Note: The Draft Presentation does not need to be complete by this date. However, along with the Abstract, it should reflect the overall intent of the presentation and contain placeholders for the remaining content to be completed by the Final
Presentation Deadline on 5th April.
For presentation format, please use the IXPUG presentation template.
For submission, please use the Submission URL
Topics of interest are (but not limited to):
- Vectorization: Data layout for efficient SIMD operations, SIMD directives and operations;
- Memory: Data layout in memory for efficient access and caching (data preconditioning), access latency concerns (prefetch, streams, costs for MCDRAM), partitioning of DDR and MCDRAM for applications (memory policies);
- Communication: including early experiences with Omni-Path;
- Thread and Process Management: Process and thread affinity issues, SMT (simultaneous multi-threading, in core), balancing processes and threads, nested threading (per tile or core);
- Multi-node Application Experience: especially on large-scale KNL systems;
- Programming Models: OpenMP 4.x, hStreams, MPI 3.0, hybrid programming (e,g, MPI/OpenMP,), others;
- Algorithms and Methods: including scalable and vectorizable algorithms;
- Software Environments and Tools;
- Benchmarking & Profiling Tools;
Presentations describing application results on multi-node configurations/addressing KNL-specific features (e.g. use of MCDRAM)/peformance tools exploitation will be prioritized.