GPU-accelerated computing drives current scientific research. Writing fast numeric algorithms for GPUs offers high application performance by offloading compute-intensive portions of the code to an NVIDIA GPU. The course will cover basic aspects of GPU…
- PRACE Training events
The PRACE RI is open to all European researchers affiliated with recognized European academic institutions and industries.
The aim of PRACE RI Training is to provide a sustained, high-quality training and education service for the European HPC community through seasonal schools, workshops and scientific and industrial seminars, in order to effectively exploit the unprecedented capabilities of HPC resources of RI.
Guiding principle in developing the training and educational programs is the compliance with the educational needs of the researchers, thorough understanding of their existing skills and competencies.Loading...
The increase in computational power goes hand in hand with an increase in the size of the data to be managed, both on the input and on the output sides. IO can easily become a bottleneck for large scale architectures.
The understanding of parallel fil…
The tipical approach to the art of programming from the point of view of a scientist only rarely permits to reach good results in terms of computational performances. The basic knowledge about how a computer machine really works permits even to a naif …
This workshop organized by VI-HPS for the German PRACE Advanced Training Centre hosted by LRZ will:
give an overview of the VI-HPS programming tools suite
explain the functionality of individual tools, and how to use them effectively
The course includes topics on code optimization for x86 platforms and
efficient code parallelization using OpenMP threading. Advanced aspects
of threading and optimization, such as new features of OpenMP 4.0, will
be covered during the cou…
Registration Open for PDC Summer School at KTH Royal Institute of Technology (Announcements Partners Trainings)
Are you interested in using one of Europe’s faster supercomputers (and getting university credit points for doing so)? Would you like to learn how to write programs for parallel supercomputers, such as a Cray or a cluster of Graphics Processing Units? Do you need to optimize already- existing scientific program code for high- performance computing? […]
In August 2015, the Cray XC40 supercomputer Hornet at HLRS was upgraded to a new system named "Hazel Hen", featuring 7712 compute nodes, each equipped with two 12 core Intel Haswell processors running at 2.5 GHz. Each node is equipped with 12…
Objectives: The objective of this course is to present to potential users the new configuration of MareNostrum and a introduction on how to use the new system (batch system, compilers, hardware, MPI, etc).Also It will provide an introduction about RES …
The aim of the workshop is to show the off-the-shelf technologies and methodologies available using the OpenFOAM® suite in an HPC environment. Contributions regarding the following topics are welcomed: parallel benchmark and performance, industrial…
Advanced usage on Curie supercomputer : Best practice for current and future HPC architectures @TGCC (Past PATC Courses)
The aim of this course is to give users the best practices to go further using CURIE system and to give hints to prepare their codes for future architectures.
architecture (hardware, interconnect, file-system),