Training for Maxeler Dataflow Architectures – Jülich, 20-21 Sept 2018

In the context of the PRACE-3IP Pre-Commercial Procurement (PCP) project, Maxeler ported a set of scientific computing applications to its FPGA-accelerated architecture and deployed a pilot system at Jülich Supercomputing Centre.

Developers of numerical applications with general interest in exploring the use of FPGAs for accelerating applications are invited to participate in this training event. No previous background in FPGA programming is required.

Lecturers will be leading experts from Maxeler. All participants will be provided with access to the Maxeler pilot system JUMAX.

The training will start on 20 Sept 2018, 9am and end at 21 Sept 2018 at 2pm.

Further information and the registration form can be found on the workshop homepage.